2-WEEKS WORKSHOP ON ADVANCE RTL DESIGN AND VERIFICATION

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2-WEEKS WORKSHOP ON ADVANCE RTL DESIGN AND VERIFICATION

By MUKESH SUKLA Categories: Workshops
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About Course

This workshop is designed to enable the learners to understand the fundamentals of digital design and verification.

Course Content

D1-1: Introduction to VLSI Design and Oppurtunities

  • Introduction to VLSI Design and Career Opportunities

D1-2: RTL Design Fundamentals

D1-3: Introduction to Design Verification

D2-1: Testbench-Based Verification

D2-2: Design Verification using Intel Quartus Flow

D2-3: System Verilog for Verification

D3-1: RTL Design using Behavioral Model

D3-2: Data Types in System Verilog

D4-1: Tasks and Functions

D4-2: Control Flow

D5: Process in SV

D6: OOPs Concept in System Verilog

Case Study: Design and Verification of D-FF with Synchronous Reset

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