DR. MUKESH KUMAR SUKLA

MNDCS-2026 Invited Talk

Internship on Protocol Design and Verification

VLSI Design Engineer - I

6-Weeks Summer Training on VLSI Design

System Verilog and Protocol Verification

Training on VLSI Circuits and PCB Design

TCL Script for VLSI Engineers

6-Days Workshop on Design Verification using System Verilog and FPGA Validation

imc2026 Quiz

Know your depth of semiconductor foundation

Summer Training on Design Verification using System Verilog

Design Verification using System Verilog and Protocol Fundamentals

Integrated Diploma in VLSI Design (IDVD)

4-Weeks Winter Training on RTL Design

Bootcamp Program on Digital Design using Verilog HDL

VLSI Sample Test (VST) Series

Foundations of System-on-Chip Design and Custom Layout Techniques for Healthcare Applications

6-Days Workshop on Digital Design using Verilog HDL

Advanced RTL Design and Verification using System Verilog (Level-1)

C PROGRAMMING FOR VLSI ENGINEERS

Python for VLSI Engineers - A Journey towards Automation

Circuit Design and Verification Engineer - I

Linux and Shell Scripting for VLSI Engineers

2-WEEKS WORKSHOP ON ADVANCE RTL DESIGN AND VERIFICATION

IETE Sponsored 6-Days Workshop on VLSI Circuits and PCB Design (Hybrid)

Semiconductor Devices

Circuit Design and SPICE Simulation Fundamentals using Electronic Design Automation Tools