MUKESH SUKLA's Profile Page

5.00 (2.00)

MUKESH SUKLA

14 Courses • 199 Students

5.00 (2.00)

Biography

Ph.D., M. Tech, B.Tech/ Experience (s): 20 Years

MUKESH SUKLA All Courses

Integrated Diploma in VLSI Design (IDVD)

Lesson 2 Student 9 View 42

MUKESH SUKLA

₹249.00 ~~₹11,800.00~~

Circuit Design and Verification Engineer – I

Lesson 9 Student 2 View 257

MUKESH SUKLA

₹5,900.00 ~~₹8,850.00~~

100h

VLSI Design Engineer – I

Lesson 32 Student 30 View 435

MUKESH SUKLA

₹499.00 ~~₹2,499.00~~

(5.00)

TCL Script for VLSI Engineers

Lesson 15 Student 29 View 457

MUKESH SUKLA

₹149.00 ~~₹999.00~~

40h

Linux and Shell Scripting for VLSI Engineers

Lesson 5 Student 17 View 359

MUKESH SUKLA

₹249.00 ~~₹1,499.00~~

72h

Python for VLSI Engineers – A Journey towards Automation

Lesson 18 Student 21 View 369

MUKESH SUKLA

₹99.00 ~~₹1,000.00~~

36h

Training on VLSI Circuits and PCB Design

Lesson 7 Student 26 View 270

MUKESH SUKLA

₹249.00 ~~₹499.00~~

45h

C PROGRAMMING FOR VLSI ENGINEERS

Lesson 18 Student 8 View 348

MUKESH SUKLA

₹499.00 ~~₹999.00~~

200h

Advanced RTL Design and Verification using System Verilog (Level-1)

Lesson 36 Student 0 View 439

MUKESH SUKLA

₹11,800.00 ~~₹15,000.00~~

2-WEEKS WORKSHOP ON ADVANCE RTL DESIGN AND VERIFICATION

Lesson 13 Student 7 View 301

MUKESH SUKLA

₹249.00 ~~₹1,000.00~~

80h

Design Verification using System Verilog

Lesson 11 Student 1 View 157

MUKESH SUKLA

₹1,499.00 ~~₹7,500.00~~

40h

6-Days Workshop on Design Verification using System Verilog and FPGA Validation

Lesson 9 Student 16 View 368

MUKESH SUKLA

₹149.00 ~~₹499.00~~

36h

IETE Sponsored 6-Days Workshop on VLSI Circuits and PCB Design (Hybrid)

Lesson 24 Student 0 View 295

MUKESH SUKLA

₹149.00 ~~₹500.00~~

VLSI Sample Test (VST) Series

Lesson 0 Student 33 View 412

MUKESH SUKLA

Free

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MUKESH SUKLA

Biography

MUKESH SUKLA All Courses

Integrated Diploma in VLSI Design (IDVD)

Circuit Design and Verification Engineer – I

VLSI Design Engineer – I

TCL Script for VLSI Engineers

Linux and Shell Scripting for VLSI Engineers

Python for VLSI Engineers – A Journey towards Automation

Training on VLSI Circuits and PCB Design

C PROGRAMMING FOR VLSI ENGINEERS

Advanced RTL Design and Verification using System Verilog (Level-1)

2-WEEKS WORKSHOP ON ADVANCE RTL DESIGN AND VERIFICATION

Design Verification using System Verilog

6-Days Workshop on Design Verification using System Verilog and FPGA Validation

IETE Sponsored 6-Days Workshop on VLSI Circuits and PCB Design (Hybrid)

VLSI Sample Test (VST) Series

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MUKESH SUKLA

Biography

MUKESH SUKLA All Courses

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